Intel® Math Kernel Library 11.0.2 User Guide
Reproducible results are provided under these conditions:
The number of threads is fixed and constant.
Specifically:
Input and output arrays are aligned on 128-byte boundaries.
Instead of the general 128-byte alignment, you can use a more specific alignment depending on the ISA. For example: 16-byte alignment suffices for Intel SSE2 or higher and 32-byte alignment suffices for Intel AVX or Intel AVX2. To ensure proper alignment of arrays, allocate memory for them using mkl_malloc/mkl_calloc.
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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |