Intel® Math Kernel Library 11.0.2 User Guide

Getting High Performance on a Cluster

While it is relatively easy to get high performance of the HPL test on a single node, it is more complicated in a cluster. To achieve high performance of the test in a cluster, follow these steps, provided all the needed installations are done on each node:

  1. Reboot all nodes.

  2. Ensure all nodes are in identical conditions.

    To do this, run single-node Stream and HPL LINPACK on every node. Ensure results are within 2% of each other (problem size must be large enough depending on memory size and CPU speed). Investigate nodes with low performance for hardware/software problems.

  3. Check your cluster interconnects are working. Run a test over the complete cluster using an MPI test for bandwidth and latency. IMB and Microway* Linkchecker tests of Intel MPI are two of many benchmarking methods useful for this subtest.

  4. Run an HPL benchmark on pairs of two nodes and ensure results are within 4% of each other (the problem size must to be large enough depending on memory size and CPU speed).

  5. Run a small HPL workload over the complete cluster to ensure correctness.

  6. Increase the problem size and run the real test load. Rerun at the real case at least three times.

  7. In case of problems go back to step 2.

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804