Intel® Math Kernel Library 11.0.2 User Guide

Linking with ScaLAPACK and Cluster FFTs on Intel Xeon Phi Coprocessors

The Intel MKL ScaLAPACK and Cluster FFTs support only Intel® MPI implementations for Intel MIC Architecture.

To link a program that calls ScaLAPACK or Cluster FFTs, you need to know how to link a message-passing interface (MPI) application first. Use MPI compiler wrappers to do this. For example, mpiicc or mpiifort are C or FORTRAN compiler wrappers, respectively, that use the correct header files and libraries. The locations of these wrappers and the MPI libraries depend on the Intel MPI version. For example, for the default installation of Intel MPI 4.1, the wrappers for the Intel MIC Architecture are /opt/impi/mic/bin/mpiicc and /opt/impi/mic/bin/mpiifort.

Check the documentation that comes with your version of Intel MPI for implementation-specific details of linking.

To link with Intel MKL ScaLAPACK and/or Cluster FFTs on Intel Xeon Phi coprocessors, use the link line shown below.

Note

The syntax below is for dynamic linking. For static linking:

/opt/impi/mic/bin/mpi{icc|ifort} <files to link> -L<MKL path> -I<MKL include>

[-lmkl_scalapack_{lp64|ilp64}] [-lmkl_cdft_core]

-lmkl_blacs_intelmpi_{lp64|ilp64}

-lmkl_intel_{lp64|ilp64}

-lmkl_{intel_thread|sequential}

-lmkl_core

[-liomp5] [-lpthread] [-lm] [-ldl]

For example, if you are using Intel MPI 4.1, want to statically link with ScaLAPACK using the LP64 interface, and have only one MPI process per core (and thus do not use threading), specify the following linker options:

-L$MKLPATH -I$MKLINCLUDE $MKLPATH/libmkl_scalapack_lp64.a $MKLPATH/libmkl_blacs_intelmpi_lp64.a $MKLPATH/libmkl_intel_lp64.a $MKLPATH/libmkl_sequential.a $MKLPATH/libmkl_core.a -static_mpi -Wl,--end-group -lpthread -lm

Tip

Use the Link-line Advisor to quickly choose the appropriate set of libraries and linker options.

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

See Also


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