Overview: Intrinsics for Intel® Post 32nm Processor Instruction Extensions

The Intel® Post 32nm Processor Instruction Extension intrinsics are assembly-coded functions that call on Intel® Post 32nm Processor Instructions that include new vector SIMD and scalar instructions targeted for Intel® 64 architecture processors in process technology smaller than 32 nm.

The prototypes for the Intel® Post 32nm Processor Instructions Intrinsics are available in the immintrin.h file.

These intrinsics map directly to the instructions defined in the "CHAPTER 8. POST-32NM PROCESSOR INSTRUCTIONS" section of "Intel® Advanced Vector Extensions Programming Reference" (http://software.intel.com/en-us/avx/).

Functional Overview

The Intel® Post 32nm Processor Instruction Extensions include:

Four intrinsics that map to two hardware instructions VCVTPS2PH and VCVTPH2PS performing 16-bit floating-point data type conversion to and from single-precision floating-point data type. The intrinsics for conversion to packed 16-bit floating-point values from packed single-precision floating-point values also provide rounding control using an immediate byte.
Three intrinsics that map to the hardware instruction RDRAND. The intrinsics generate random numbers of 16/32/64 bit wide random integers.
Eight intrinsics that map to the hardware instructions RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE. The intrinsics allow software that works in the 64-bit environment to read and write the FS base and GS base registers at all privileged levels.