Store Intrinsics
- _mm512_store_ps/_mm512_mask_store_ps
Stores float32 vector. Corresponding instruction is VMOVAPS. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extstore_ps/_mm512_mask_extstore_ps
Stores with conversion of float32 vector. Corresponding instruction is VMOVAPS. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_store_epi32/_mm512_mask_store_epi32
Stores int32 vector. Corresponding instruction is VMOVDQA32. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extstore_epi32/_mm512_mask_extstore_epi32
Stores with conversion of int32 vector. Corresponding instruction is . This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_store_pd/_mm512_mask_store_pd
Stores float64 vector. Corresponding instruction is VMOVAPD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extstore_pd/_mm512_mask_extstore_pd
Stores with conversion of float64 vector. Corresponding instruction is VMOVAPD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_store_epi64/_mm512_mask_store_epi64
Stores int64 vector. Corresponding instruction is VMOVDQA64. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extstore_epi64/_mm512_mask_extstore_epi64
Stores with conversion of int64 vector. Corresponding instruction is VMOVDQA64. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_packstorehi_epi32/_mm512_mask_packstorehi_epi32
Packs mask-enabled elements of int32 vector to form an unaligned int32 stream and stores that portion of the stream that maps to the high 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTOREHD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extpackstorehi_epi32/_mm512_mask_extpackstorehi_epi32
Packs mask-enabled elements of int32 vector to form an unaligned int32 stream, down-converts it, and stores that portion of the stream that maps to the high 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTOREHD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_packstorelo_epi32/_mm512_mask_packstorelo_epi32
Packs mask-enabled elements of int32 vector to form an unaligned int32 stream and stores that portion of the stream that maps to the low 64-byte-aligned portion of the memory destination. Corresponding instruction is VPACKSTORELD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extpackstorelo_epi32/_mm512_mask_extpackstorelo_epi32
Packs mask-enabled elements of int32 vector to form an unaligned int32 stream, down-converts it, and stores that portion of the stream that maps to the low 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTORELD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_packstorehi_epi64/_mm512_mask_packstorehi_epi64
Packs mask-enabled elements of int64 vector to form an unaligned int64 stream and stores that portion of the stream that maps to the high 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTOREHPD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extpackstorehi_epi64/_mm512_mask_extpackstorehi_epi64
Packs mask-enabled elements of int64 vector to form an unaligned int64 stream, down-converts it, and stores that portion of the stream that maps to the high 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTOREHD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_packstorelo_epi64/_mm512_mask_packstorelo_epi64
Packs mask-enabled elements of int64 vector to form an unaligned int64 stream and stores that portion of the stream that maps to the low 64-byte-aligned portion of the memory destination. Corresponding instruction is VPACKSTORELD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extpackstorelo_epi64/_mm512_mask_extpackstorelo_epi64
Packs mask-enabled elements of int64 vector to form an unaligned int64 stream, down-converts it, and stores that portion of the stream that maps to the low 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTORELD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_packstorehi_ps/_mm512_mask_packstorehi_ps
Packs mask-enabled elements of float32 vector to form an unaligned float32 stream and stores that portion of the stream that maps to the high 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTOREHPS. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extpackstorehi_ps/_mm512_mask_extpackstorehi_ps
Packs mask-enabled elements of float32 vector to form an unaligned float stream, down-converts it, and stores that portion of the stream that maps to the high 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTOREHPS. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_packstorelo_ps/_mm512_mask_packstorelo_ps
Packs mask-enabled elements of float32 vector to form an unaligned float32 stream and stores that portion of the stream that maps to the low 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTORELD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extpackstorelo_ps/_mm512_mask_extpackstorelo_ps
Packs mask-enabled elements of float32 vector to form an unaligned float32 stream, down-converts it, and stores that portion of the stream that maps to the low 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTORELPS. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_packstorehi_pd/_mm512_mask_packstorehi_pd
Packs mask-enabled elements of float64 vector to form an unaligned float64 stream and stores that portion of the stream that maps to the high 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTOREHPD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extpackstorehi_pd/_mm512_mask_extpackstorehi_pd
Packs mask-enabled elements of float64 vector to form an unaligned float64 stream, down-converts it, and stores that portion of the stream that maps to the high 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTOREHPD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_packstorelo_pd/_mm512_mask_packstorelo_pd
Packs mask-enabled elements of float64 vector to form an unaligned float64 stream and stores that portion of the stream that maps to the low 64-byte-aligned portion of the memory destination. Corresponding instruction is VPACKSTORELD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_extpackstorelo_pd/_mm512_mask_extpackstorelo_pd
Packs mask-enabled elements of float64 vector to form an unaligned float64 stream, down-converts it, and stores that portion of the stream that maps to the low 64-byte aligned portion of the memory destination. Corresponding instruction is VPACKSTORELD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_storenr_ps
Stores aligned float32 vector with a no-read hint. Corresponding instruction is VMOVNRAPS. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_storenr_pd
Stores aligned float64 vector with a no-read hint. Corresponding instruction is VMOVNRAPD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_storenrngo_ps
Non-ordered stores aligned float32 vector with a no-read hint. Corresponding instruction is VMOVNRNGOAPS. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_storenrngo_pd
Non-ordered stores aligned float64 vector with a no-read hint. Corresponding instruction is VMOVNRNGOAPD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).