Bitwise Intrinsics
- _mm512_and_epi32/ _mm512_mask_and_epi32
Bitwise AND operation between int32 vectors. Corresponding instruction is VPANDD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_and_epi64/ _mm512_mask_and_epi64
Bitwise AND operation between int64 vectors. Corresponding instruction is VPANDQ. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_andnot_epi32/ _mm512_mask_andnot_epi32
Bitwise AND operation between NOT operated int32 vectors. Corresponding instruction is VPANDND. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_andnot_epi64/ _mm512_mask_andnot_epi64
Bitwise AND operation between NOT operated int64 vectors. Corresponding instruction is VPANDNQ. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_or_epi32/ _mm512_mask_or_epi32
Bitwise OR operation between int32 vectors. Corresponding instruction is VPORD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_or_epi64/ _mm512_mask_or_epi64
Bitwise OR operation between int64 vectors. Corresponding instruction is VPORQ. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_test_epi32_mask/ _mm512_mask_test_epi32_mask
Performs bitwise AND operation between int32 vectors. Corresponding instruction is VPTESTMD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_xor_epi32/ _mm512_mask_xor_epi32
Bitwise XOR operation between int32 vectors. Corresponding instruction is VPXORD. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
- _mm512_xor_epi64/ _mm512_mask_xor_epi64
Bitwise XOR operation between int64 vectors. Corresponding instruction is VPXORQ. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).